{"created":"2021-03-01T06:17:42.958319+00:00","id":10860,"links":{},"metadata":{"_buckets":{"deposit":"531ec266-acf0-43ff-b9b0-18d68a12d019"},"_deposit":{"id":"10860","owners":[],"pid":{"revision_id":0,"type":"depid","value":"10860"},"status":"published"},"_oai":{"id":"oai:nagoya.repo.nii.ac.jp:00010860","sets":["320:321:322"]},"author_link":["32673","32674","32675","32676"],"item_10_alternative_title_19":{"attribute_name":"その他のタイトル","attribute_value_mlt":[{"subitem_alternative_title":"Pulsed Neural Networks Based on Delta-Sigma Modulation with GHA Learning Rule and Their Hardware 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変調された1ビットのパルス信号で値が表現されるため小さな回路規模で実現可能であり，1ビットでありながら精度の良い演算を実現できる．本論文では，提案するニューラルネットワークのハードウェア実装法を提案する．そして，GHA学習則を組み込んだニューラルネットワークを，FPGA上にハードウェア実装し，その動作検証を行う．また，提案するニューラルネットワークとCPUをFPGA上に実装し，単位時間，単位回路規模当りに処理できるビット数を評価値として比較を行った．提案手法はCPU上のソフトウェア実現に比べて200倍程度の評価値が得られた．","subitem_description_language":"ja","subitem_description_type":"Abstract"}]},"item_10_identifier_60":{"attribute_name":"URI","attribute_value_mlt":[{"subitem_identifier_type":"HDL","subitem_identifier_uri":"http://hdl.handle.net/2237/12706"},{"subitem_identifier_type":"URI","subitem_identifier_uri":"http://www.ieice.org/jpn/trans_online/index.html"}]},"item_10_publisher_32":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"電子情報通信学会","subitem_publisher_language":"ja"}]},"item_10_relation_43":{"attribute_name":"関連情報","attribute_value_mlt":[{"subitem_relation_type":"isVersionOf","subitem_relation_type_id":{"subitem_relation_type_id_text":"http://www.ieice.org/jpn/trans_online/index.html","subitem_relation_type_select":"URI"}}]},"item_10_rights_12":{"attribute_name":"権利","attribute_value_mlt":[{"subitem_rights":"Copyright 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