{"_buckets": {"deposit": "525dc59a-855e-4276-90b4-fadaaf0667c9"}, "_deposit": {"id": "13138", "owners": [], "pid": {"revision_id": 0, "type": "depid", "value": "13138"}, "status": "published"}, "_oai": {"id": "oai:nagoya.repo.nii.ac.jp:00013138", "sets": []}, "author_link": ["41376", "41377", "41378", "41379", "41380"], "item_10_biblio_info_6": {"attribute_name": "\u66f8\u8a8c\u60c5\u5831", "attribute_value_mlt": [{"bibliographicIssueDates": {"bibliographicIssueDate": "2010-12-01", "bibliographicIssueDateType": "Issued"}, "bibliographicIssueNumber": "12", "bibliographicPageEnd": "2516", "bibliographicPageStart": "2509", "bibliographicVolumeNumber": "E93-A", "bibliographic_titles": [{"bibliographic_title": "IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences", "bibliographic_titleLang": "en"}]}]}, "item_10_description_4": {"attribute_name": "\u6284\u9332", "attribute_value_mlt": [{"subitem_description": "We present a hardware sharing method for design space exploration of multi-processor embedded systems. In our prior work, we had developed a system-level design tool named SystemBuilder which automatically synthesizes target implementation of a system from a functional description. In this work, we have extended SystemBuilder so that it can automatically synthesize an area-efficient implementation which shares a hardware module among different applications. With SystemBuilder, designers only need to enable an option in order to share a hardware module. The designers, therefore, can easily explore a design space including hardware sharing in short time. A case study shows the effectiveness of the hardware sharing on design space exploration.", "subitem_description_language": "en", "subitem_description_type": "Abstract"}]}, "item_10_identifier_60": {"attribute_name": "URI", "attribute_value_mlt": [{"subitem_identifier_type": "URI", "subitem_identifier_uri": "http://www.ieice.org/jpn/trans_online/index.html"}, {"subitem_identifier_type": "HDL", "subitem_identifier_uri": "http://hdl.handle.net/2237/15033"}]}, "item_10_publisher_32": {"attribute_name": "\u51fa\u7248\u8005", "attribute_value_mlt": [{"subitem_publisher": "Institute of Electronics, Information and Communication Engineers", "subitem_publisher_language": "en"}]}, "item_10_relation_43": {"attribute_name": "\u95a2\u9023\u60c5\u5831", "attribute_value_mlt": [{"subitem_relation_type": "isVersionOf", "subitem_relation_type_id": {"subitem_relation_type_id_text": "http://www.ieice.org/jpn/trans_online/index.html", "subitem_relation_type_select": "URI"}}]}, "item_10_rights_12": {"attribute_name": "\u6a29\u5229", "attribute_value_mlt": [{"subitem_rights": "Copyright (C) 2010 IEICE", "subitem_rights_language": "en"}]}, "item_10_select_15": {"attribute_name": "\u8457\u8005\u7248\u30d5\u30e9\u30b0", "attribute_value_mlt": [{"subitem_select_item": "publisher"}]}, "item_10_source_id_7": {"attribute_name": "ISSN", "attribute_value_mlt": [{"subitem_source_identifier": "0916-8508", "subitem_source_identifier_type": "PISSN"}]}, "item_1615787544753": {"attribute_name": "\u51fa\u7248\u30bf\u30a4\u30d7", "attribute_value_mlt": [{"subitem_version_resource": "http://purl.org/coar/version/c_970fb48d4fbd8a85", "subitem_version_type": "VoR"}]}, "item_access_right": {"attribute_name": "\u30a2\u30af\u30bb\u30b9\u6a29", "attribute_value_mlt": [{"subitem_access_right": "open access", "subitem_access_right_uri": "http://purl.org/coar/access_right/c_abf2"}]}, "item_creator": {"attribute_name": "\u8457\u8005", "attribute_type": "creator", "attribute_value_mlt": [{"creatorNames": [{"creatorName": "ANDO, Yuki", "creatorNameLang": "en"}], "nameIdentifiers": [{"nameIdentifier": "41376", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "SHIBATA, Seiya", "creatorNameLang": "en"}], "nameIdentifiers": [{"nameIdentifier": "41377", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "HONDA, Shinya", "creatorNameLang": "en"}], "nameIdentifiers": [{"nameIdentifier": "41378", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "TOMIYAMA, Hiroyuki", "creatorNameLang": "en"}], "nameIdentifiers": [{"nameIdentifier": "41379", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "TAKADA, Hiroaki", "creatorNameLang": "en"}], "nameIdentifiers": [{"nameIdentifier": "41380", "nameIdentifierScheme": "WEKO"}]}]}, "item_files": {"attribute_name": "\u30d5\u30a1\u30a4\u30eb\u60c5\u5831", "attribute_type": "file", "attribute_value_mlt": [{"accessrole": "open_date", "date": [{"dateType": "Available", "dateValue": "2018-02-20"}], "displaytype": "detail", "download_preview_message": "", "file_order": 0, "filename": "240.pdf", "filesize": [{"value": "1.5 MB"}], "format": "application/pdf", "future_date_message": "", "is_thumbnail": false, "licensetype": "license_note", "mimetype": "application/pdf", "size": 1500000.0, "url": {"label": "240.pdf", "objectType": "fulltext", "url": "https://nagoya.repo.nii.ac.jp/record/13138/files/240.pdf"}, "version_id": "0f82041c-cb51-4647-b968-b3b1cb19b341"}]}, "item_keyword": {"attribute_name": "\u30ad\u30fc\u30ef\u30fc\u30c9", "attribute_value_mlt": [{"subitem_subject": "system-level design", "subitem_subject_scheme": "Other"}, {"subitem_subject": "hardware sharing", "subitem_subject_scheme": "Other"}, {"subitem_subject": "design space exploration", "subitem_subject_scheme": "Other"}, {"subitem_subject": "MPSoC", "subitem_subject_scheme": "Other"}]}, "item_language": {"attribute_name": "\u8a00\u8a9e", "attribute_value_mlt": [{"subitem_language": "eng"}]}, "item_resource_type": {"attribute_name": "\u8cc7\u6e90\u30bf\u30a4\u30d7", "attribute_value_mlt": [{"resourcetype": "journal article", "resourceuri": "http://purl.org/coar/resource_type/c_6501"}]}, "item_title": "Automatic Communication Synthesis with Hardware Sharing for Multi-Processor SoC Design", "item_titles": {"attribute_name": "\u30bf\u30a4\u30c8\u30eb", "attribute_value_mlt": [{"subitem_title": "Automatic Communication Synthesis with Hardware Sharing for Multi-Processor SoC Design", "subitem_title_language": "en"}]}, "item_type_id": "10", "owner": "1", "path": ["312/313/314"], "permalink_uri": "http://hdl.handle.net/2237/15033", "pubdate": {"attribute_name": "PubDate", "attribute_value": "2011-07-05"}, "publish_date": "2011-07-05", "publish_status": "0", "recid": "13138", "relation": {}, "relation_version_is_last": true, "title": ["Automatic Communication Synthesis with Hardware Sharing for Multi-Processor SoC Design"], "weko_shared_id": -1}