{"created":"2021-03-01T06:20:09.208529+00:00","id":13147,"links":{},"metadata":{"_buckets":{"deposit":"b33b93c7-c2d1-4154-af9d-f69c51d148c9"},"_deposit":{"id":"13147","owners":[],"pid":{"revision_id":0,"type":"depid","value":"13147"},"status":"published"},"_oai":{"id":"oai:nagoya.repo.nii.ac.jp:00013147"},"item_10_biblio_info_6":{"attribute_name":"\u66f8\u8a8c\u60c5\u5831","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"2004-04-01","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"4","bibliographicPageEnd":"612","bibliographicPageStart":"606","bibliographicVolumeNumber":"E87-C","bibliographic_titles":[{"bibliographic_title":"IEICE transactions on electronics"}]}]},"item_10_description_4":{"attribute_name":"\u6284\u9332","attribute_value_mlt":[{"subitem_description":"Energy consumption has become one of the most critical constraints in the design of portable multimedia systems. For media applications, address buses between processor and data memory consume a considerable amount of energy due to their large capacitance and frequent accesses. This paper studies impacts of memory data organization on the address bus energy. Our experiments show that the address bus activity is significantly reduced by 50% through exploring memory data organization and encoding address buses.","subitem_description_type":"Abstract"}]},"item_10_identifier_60":{"attribute_name":"URI","attribute_value_mlt":[{"subitem_identifier_type":"HDL","subitem_identifier_uri":"http://hdl.handle.net/2237/15042"}]},"item_10_publisher_32":{"attribute_name":"\u51fa\u7248\u8005","attribute_value_mlt":[{"subitem_publisher":"Institute of Electronics, Information and Communication Engineers"}]},"item_10_rights_12":{"attribute_name":"\u6a29\u5229","attribute_value_mlt":[{"subitem_rights":"Copyright (C) 2004 IEICE"}]},"item_10_select_15":{"attribute_name":"\u8457\u8005\u7248\u30d5\u30e9\u30b0","attribute_value_mlt":[{"subitem_select_item":"publisher"}]},"item_10_source_id_7":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"0916-8516","subitem_source_identifier_type":"ISSN"}]},"item_creator":{"attribute_name":"\u8457\u8005","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"TOMIYAMA, Hiroyuki"}],"nameIdentifiers":[{"nameIdentifier":"41433","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"TAKADA, Hiroaki"}],"nameIdentifiers":[{"nameIdentifier":"41434","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"DUTT, Nikil D."}],"nameIdentifiers":[{"nameIdentifier":"41435","nameIdentifierScheme":"WEKO"}]}]},"item_files":{"attribute_name":"\u30d5\u30a1\u30a4\u30eb\u60c5\u5831","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_date","date":[{"dateType":"Available","dateValue":"2018-02-20"}],"displaytype":"detail","filename":"249.pdf","filesize":[{"value":"319.8 kB"}],"format":"application/pdf","licensetype":"license_note","mimetype":"application/pdf","url":{"label":"249.pdf","url":"https://nagoya.repo.nii.ac.jp/record/13147/files/249.pdf"},"version_id":"3dcd93f3-1791-4273-833a-7480e8038881"}]},"item_keyword":{"attribute_name":"\u30ad\u30fc\u30ef\u30fc\u30c9","attribute_value_mlt":[{"subitem_subject":"compilers","subitem_subject_scheme":"Other"},{"subitem_subject":"embedded processors","subitem_subject_scheme":"Other"},{"subitem_subject":"memory data organization","subitem_subject_scheme":"Other"},{"subitem_subject":"low energy","subitem_subject_scheme":"Other"},{"subitem_subject":"bus encoding","subitem_subject_scheme":"Other"}]},"item_language":{"attribute_name":"\u8a00\u8a9e","attribute_value_mlt":[{"subitem_language":"eng"}]},"item_resource_type":{"attribute_name":"\u8cc7\u6e90\u30bf\u30a4\u30d7","attribute_value_mlt":[{"resourcetype":"journal article","resourceuri":"http://purl.org/coar/resource_type/c_6501"}]},"item_title":"Memory Data Organization for Low-Energy Address Buses","item_titles":{"attribute_name":"\u30bf\u30a4\u30c8\u30eb","attribute_value_mlt":[{"subitem_title":"Memory Data Organization for Low-Energy Address Buses"}]},"item_type_id":"10","owner":"1","path":["312/313/314"],"pubdate":{"attribute_name":"\u516c\u958b\u65e5","attribute_value":"2011-07-05"},"publish_date":"2011-07-05","publish_status":"0","recid":"13147","relation_version_is_last":true,"title":["Memory Data Organization for Low-Energy Address Buses"],"weko_creator_id":"1","weko_shared_id":null},"updated":"2021-03-01T18:37:31.527226+00:00"}