{"created":"2021-03-01T06:29:20.928395+00:00","id":21658,"links":{},"metadata":{"_buckets":{"deposit":"573180d8-7abb-4717-a52c-a03eda0c4538"},"_deposit":{"id":"21658","owners":[],"pid":{"revision_id":0,"type":"depid","value":"21658"},"status":"published"},"_oai":{"id":"oai:nagoya.repo.nii.ac.jp:00021658","sets":["320:321:322"]},"author_link":["63895","63896","63897","63898","63899","63900","63901","63902"],"item_10_alternative_title_19":{"attribute_name":"その他のタイトル","attribute_value_mlt":[{"subitem_alternative_title":"Design and Evaluation of Data-Path for Low-Power Single-Flux-Quantum Microprocessors","subitem_alternative_title_language":"en"}]},"item_10_biblio_info_6":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"2013-07","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"149","bibliographicPageEnd":"10","bibliographicPageStart":"5","bibliographicVolumeNumber":"113","bibliographic_titles":[{"bibliographic_title":"電子情報通信学会技術研究報告. SCE, 超伝導エレクトロニクス","bibliographic_titleLang":"ja"}]}]},"item_10_description_4":{"attribute_name":"抄録","attribute_value_mlt":[{"subitem_description":"我々は、AIST 10kA/cm^2 Nbアドバンストプロセス(ADP)を用いて単一磁束量子 (SFQ)回路によるマイクロプロセッサにおけるデータパスの設計を行った。SF 回路によるマイクロプロセッサにより、低消費電力かつ高速処理が可能なハイエンドコンピュータの実現が期待される。今回設計したデータパスでは、レジスタを2列に配置し、その出力を2入力ある算術論理演算器 (ALU)にスイッチ回路により接続し、ALUの出力をレジスタにスイッチ回路により接続した構造になっている。本研究では、従来のセルベース設計によるデータパスと、消費電力を1/10としたセルを用いたデータパスの2つの設計を行い、一部の動作を確認した。","subitem_description_language":"ja","subitem_description_type":"Abstract"},{"subitem_description":"We have designed data-path prototypes using the single-flux-quantum (SFQ) circuits fabricated with the AIST 10 kA/cm^2 Nb advanced process (ADP) for microprocessors. The microprocessor using SFQ circuits are promising for realization of low-power consumption, high-performance high-end computers. The designed data-paths are composed of 2 registers placed in parallel and an arithmetic logic unit (ALU). The outputs of the registers are connected to the inputs of the ALU via a switch circuit, and the output of the ALU is connected to one of the inputs of the registers via another switch circuit. In this study, we have designed the data-paths based on the cell-based design technique, using the conventional cell library and low-power cell library with 1/10 power consumption, and confirmed the partial operations.","subitem_description_language":"en","subitem_description_type":"Abstract"}]},"item_10_description_5":{"attribute_name":"内容記述","attribute_value_mlt":[{"subitem_description":"(信号処理基盤技術及びその応用,一般)","subitem_description_language":"ja","subitem_description_type":"Other"},{"subitem_description":"IEICE Technical Report;SCE2013-11","subitem_description_language":"en","subitem_description_type":"Other"}]},"item_10_identifier_60":{"attribute_name":"URI","attribute_value_mlt":[{"subitem_identifier_type":"URI","subitem_identifier_uri":"http://ci.nii.ac.jp/naid/110009778167/"},{"subitem_identifier_type":"HDL","subitem_identifier_uri":"http://hdl.handle.net/2237/23806"}]},"item_10_publisher_32":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"一般社団法人電子情報通信学会","subitem_publisher_language":"ja"}]},"item_10_relation_40":{"attribute_name":"シリーズ","attribute_value_mlt":[{"subitem_relation_name":[{"subitem_relation_name_text":"IEICE Technical Report;SCE2013-11"}]}]},"item_10_relation_43":{"attribute_name":"関連情報","attribute_value_mlt":[{"subitem_relation_type":"isVersionOf","subitem_relation_type_id":{"subitem_relation_type_id_text":"http://ci.nii.ac.jp/naid/110009778167/","subitem_relation_type_select":"URI"}}]},"item_10_rights_12":{"attribute_name":"権利","attribute_value_mlt":[{"subitem_rights":"(c)一般社団法人電子情報通信学会 本文データは学協会の許諾に基づきCiNiiから複製したものである","subitem_rights_language":"ja"}]},"item_10_select_15":{"attribute_name":"著者版フラグ","attribute_value_mlt":[{"subitem_select_item":"publisher"}]},"item_10_source_id_7":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"0913-5685","subitem_source_identifier_type":"PISSN"}]},"item_1615787544753":{"attribute_name":"出版タイプ","attribute_value_mlt":[{"subitem_version_resource":"http://purl.org/coar/version/c_970fb48d4fbd8a85","subitem_version_type":"VoR"}]},"item_access_right":{"attribute_name":"アクセス権","attribute_value_mlt":[{"subitem_access_right":"open access","subitem_access_right_uri":"http://purl.org/coar/access_right/c_abf2"}]},"item_creator":{"attribute_name":"著者","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"早川, 雄飛","creatorNameLang":"ja"}],"nameIdentifiers":[{"nameIdentifier":"63895","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"高田, 賢介","creatorNameLang":"ja"}],"nameIdentifiers":[{"nameIdentifier":"63896","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"田中, 雅光","creatorNameLang":"ja"}],"nameIdentifiers":[{"nameIdentifier":"63897","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"藤巻, 朗","creatorNameLang":"ja"}],"nameIdentifiers":[{"nameIdentifier":"63898","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"HAYAKAWA, Yuhi","creatorNameLang":"en"}],"nameIdentifiers":[{"nameIdentifier":"63899","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"TAKATA, Kensuke","creatorNameLang":"en"}],"nameIdentifiers":[{"nameIdentifier":"63900","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"TANAKA, Masamitsu","creatorNameLang":"en"}],"nameIdentifiers":[{"nameIdentifier":"63901","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"FUJIMAKI, Akira","creatorNameLang":"en"}],"nameIdentifiers":[{"nameIdentifier":"63902","nameIdentifierScheme":"WEKO"}]}]},"item_files":{"attribute_name":"ファイル情報","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_date","date":[{"dateType":"Available","dateValue":"2018-02-21"}],"displaytype":"detail","filename":"110009778167.pdf","filesize":[{"value":"946.7 kB"}],"format":"application/pdf","licensetype":"license_note","mimetype":"application/pdf","url":{"label":"110009778167.pdf","objectType":"fulltext","url":"https://nagoya.repo.nii.ac.jp/record/21658/files/110009778167.pdf"},"version_id":"437de747-65f7-4201-999b-230bd3092b6e"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"SFQ回路","subitem_subject_scheme":"Other"},{"subitem_subject":"マイクロプロセッサ","subitem_subject_scheme":"Other"},{"subitem_subject":"10kA/cm^2プロセス","subitem_subject_scheme":"Other"},{"subitem_subject":"データパス","subitem_subject_scheme":"Other"},{"subitem_subject":"SFQ circuit","subitem_subject_scheme":"Other"},{"subitem_subject":"microprocessor","subitem_subject_scheme":"Other"},{"subitem_subject":"10kA/cm2 process","subitem_subject_scheme":"Other"},{"subitem_subject":"data−path","subitem_subject_scheme":"Other"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourcetype":"journal article","resourceuri":"http://purl.org/coar/resource_type/c_6501"}]},"item_title":"低消費電力化単一磁束量子マイクロプロセッサにおけるデータパスの設計と評価","item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"低消費電力化単一磁束量子マイクロプロセッサにおけるデータパスの設計と評価","subitem_title_language":"ja"}]},"item_type_id":"10","owner":"1","path":["322"],"pubdate":{"attribute_name":"PubDate","attribute_value":"2016-03-09"},"publish_date":"2016-03-09","publish_status":"0","recid":"21658","relation_version_is_last":true,"title":["低消費電力化単一磁束量子マイクロプロセッサにおけるデータパスの設計と評価"],"weko_creator_id":"1","weko_shared_id":-1},"updated":"2023-01-16T04:10:55.711594+00:00"}