{"_buckets": {"deposit": "5bc16ae3-6483-44c9-88bf-452de936758b"}, "_deposit": {"id": "10261", "owners": [], "pid": {"revision_id": 0, "type": "depid", "value": "10261"}, "status": "published"}, "_oai": {"id": "oai:nagoya.repo.nii.ac.jp:00010261", "sets": ["599"]}, "author_link": ["31090", "31091", "31092", "31093", "31094"], "item_10_biblio_info_6": {"attribute_name": "書誌情報", "attribute_value_mlt": [{"bibliographicIssueDates": {"bibliographicIssueDate": "2008-01", "bibliographicIssueDateType": "Issued"}, "bibliographicPageEnd": "367", "bibliographicPageStart": "362", "bibliographic_titles": [{"bibliographic_title": "4th IEEE International Symposium on Electronic Design, Test and Applications (DELTA 2008)", "bibliographic_titleLang": "en"}]}]}, "item_10_description_4": {"attribute_name": "抄録", "attribute_value_mlt": [{"subitem_description": "In the design of embedded systems, especially battery-powered systems, it is important to reduce energy consumption. Cache are now used not only in general-purpose processors but also in embedded processors. As feature sizes shrink, the leakage energy has contributed to a significant portion of total energy consumption. To reduce the leak-age energy of cache, the Drowsy cache was proposed, in which the cache lines are periodically moved to the low-leakage mode without loss of its content. However, when a cache line in the low-leakage mode is accessed, one or more clock cycles are required to transition the cache line back to the normal mode before its content can be accessed. As a result, these penalty cycles may significantly degrade the cache performance, especially in embedded processors without out-of-order execution. In this paper, we propose four mode transition policies which aim at high energy re-duction with the minimum performance degradation. We also compare our policies with existing policies in the context of embedded processors. Experimental results demon-strate the effectiveness of the proposed policies.", "subitem_description_language": "en", "subitem_description_type": "Abstract"}]}, "item_10_identifier_60": {"attribute_name": "URI", "attribute_value_mlt": [{"subitem_identifier_type": "DOI", "subitem_identifier_uri": "http://dx.doi.org/10.1109/DELTA.2008.70"}, {"subitem_identifier_type": "HDL", "subitem_identifier_uri": "http://hdl.handle.net/2237/12081"}]}, "item_10_publisher_32": {"attribute_name": "出版者", "attribute_value_mlt": [{"subitem_publisher": "IEEE", "subitem_publisher_language": "en"}]}, "item_10_relation_11": {"attribute_name": "DOI", "attribute_value_mlt": [{"subitem_relation_type": "isVersionOf", "subitem_relation_type_id": {"subitem_relation_type_id_text": "https://doi.org/10.1109/DELTA.2008.70", "subitem_relation_type_select": "DOI"}}]}, "item_10_rights_12": {"attribute_name": "権利", "attribute_value_mlt": [{"subitem_rights": "Copyright © 2008 IEEE. Reprinted from 4th IEEE International Symposium on Electronic Design, Test and Applications, 2008. DELTA 2008. p.362-367. This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of Nagoya University’s products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to \u003cbr/\u003epubs-permissions@ieee.org.", "subitem_rights_language": "en"}]}, "item_10_select_15": {"attribute_name": "著者版フラグ", "attribute_value_mlt": [{"subitem_select_item": "publisher"}]}, "item_10_text_14": {"attribute_name": "フォーマット", "attribute_value_mlt": [{"subitem_text_value": "application/pdf"}]}, "item_1615787544753": {"attribute_name": "出版タイプ", "attribute_value_mlt": [{"subitem_version_resource": "http://purl.org/coar/version/c_970fb48d4fbd8a85", "subitem_version_type": "VoR"}]}, "item_access_right": {"attribute_name": "アクセス権", "attribute_value_mlt": [{"subitem_access_right": "open access", "subitem_access_right_uri": "http://purl.org/coar/access_right/c_abf2"}]}, "item_creator": {"attribute_name": "著者", "attribute_type": "creator", "attribute_value_mlt": [{"creatorNames": [{"creatorName": "Zushi, Junpei", "creatorNameLang": "en"}], "nameIdentifiers": [{"nameIdentifier": "31090", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "Zeng, Gang", "creatorNameLang": "en"}], "nameIdentifiers": [{"nameIdentifier": "31091", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "Tomiyama, Hiroyuki", "creatorNameLang": "en"}], "nameIdentifiers": [{"nameIdentifier": "31092", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "Takada, Hiroaki", "creatorNameLang": "en"}], "nameIdentifiers": [{"nameIdentifier": "31093", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "Inoue, Koji", "creatorNameLang": "en"}], "nameIdentifiers": [{"nameIdentifier": "31094", "nameIdentifierScheme": "WEKO"}]}]}, "item_files": {"attribute_name": "ファイル情報", "attribute_type": "file", "attribute_value_mlt": [{"accessrole": "open_date", "date": [{"dateType": "Available", "dateValue": "2018-02-20"}], "displaytype": "detail", "download_preview_message": "", "file_order": 0, "filename": "delta2008.pdf", "filesize": [{"value": "457.3 kB"}], "format": "application/pdf", "future_date_message": "", "is_thumbnail": false, "licensetype": "license_note", "mimetype": "application/pdf", "size": 457300.0, "url": {"label": "delta2008.pdf", "objectType": "fulltext", "url": "https://nagoya.repo.nii.ac.jp/record/10261/files/delta2008.pdf"}, "version_id": "2ff8bb1e-5220-41fe-8fc3-74244209700e"}]}, "item_language": {"attribute_name": "言語", "attribute_value_mlt": [{"subitem_language": "eng"}]}, "item_resource_type": {"attribute_name": "資源タイプ", "attribute_value_mlt": [{"resourcetype": "journal article", "resourceuri": "http://purl.org/coar/resource_type/c_6501"}]}, "item_title": "Improved Policies for Drowsy Caches in Embedded Processors", "item_titles": {"attribute_name": "タイトル", "attribute_value_mlt": [{"subitem_title": "Improved Policies for Drowsy Caches in Embedded Processors", "subitem_title_language": "en"}]}, "item_type_id": "10", "owner": "1", "path": ["599"], "permalink_uri": "http://hdl.handle.net/2237/12081", "pubdate": {"attribute_name": "PubDate", "attribute_value": "2009-08-25"}, "publish_date": "2009-08-25", "publish_status": "0", "recid": "10261", "relation": {}, "relation_version_is_last": true, "title": ["Improved Policies for Drowsy Caches in Embedded Processors"], "weko_shared_id": -1}