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  1. B100 理学部/理学研究科
  2. B100a 雑誌掲載論文
  3. 学術雑誌

Subnanosecond Time-to-Digital Converter Implemented in a Kintex-7 FPGA

http://hdl.handle.net/2237/27263
http://hdl.handle.net/2237/27263
4b278264-fdb3-4a6e-a5d3-891e6ff97688
名前 / ファイル ライセンス アクション
Kintex7_TDC_Preprint.pdf Kintex7_TDC_Preprint.pdf ファイル公開日:2019/12/01 (4.9 MB)
Item type 学術雑誌論文 / Journal Article(1)
公開日 2018-01-15
タイトル
タイトル Subnanosecond Time-to-Digital Converter Implemented in a Kintex-7 FPGA
言語 en
著者 Sano, Y.

× Sano, Y.

WEKO 74727

en Sano, Y.

Search repository
Horii, Y.

× Horii, Y.

WEKO 74728

en Horii, Y.

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Ikeno, M.

× Ikeno, M.

WEKO 74729

en Ikeno, M.

Search repository
Sasaki, O.

× Sasaki, O.

WEKO 74730

en Sasaki, O.

Search repository
Tomoto, M.

× Tomoto, M.

WEKO 74731

en Tomoto, M.

Search repository
Uchida, T.

× Uchida, T.

WEKO 74732

en Uchida, T.

Search repository
アクセス権
アクセス権 open access
アクセス権URI http://purl.org/coar/access_right/c_abf2
権利
言語 en
権利情報 © 2017. This manuscript version is made available under the CC-BY-NC-ND 4.0 license http://creativecommons.org/licenses/by-nc-nd/4.0/
キーワード
主題Scheme Other
主題 Time-to-digital converter
キーワード
主題Scheme Other
主題 Field-programmable gate array
抄録
内容記述 Time-to-digital converters (TDCs) are used in various fields, including high-energy physics. One advantage of implementing TDCs in field-programmable gate arrays (FPGAs) is the flexibility on the modification of the logics, which is useful to cope with the changes in the experimental conditions. Recent FPGAs make it possible to implement TDCs with a time resolution less than 10 ps. On the other hand, various drift chambers require a time resolution of O(0.1) ns, and a simple and easy-to-implement TDC is useful for a robust operation. Herein an eight-channel TDC with a variable bin size down to 0.28 ns is implemented in a Xilinx Kintex-7 FPGA and tested. The TDC is based on a multisampling scheme with quad phase clocks synchronised with an external reference clock. Calibration of the bin size is unnecessary if a stable reference clock is available, which is common in high-energy physics experiments. Depending on the channel, the standard deviation of the differential nonlinearity for a 0.28 ns bin size is 0.13–0.31. The performance has a negligible dependence on the temperature. The power consumption and the potential to extend the number of channels are also discussed.
言語 en
内容記述タイプ Abstract
出版者
言語 en
出版者 Elsevier
言語
言語 eng
資源タイプ
資源タイプresource http://purl.org/coar/resource_type/c_6501
タイプ journal article
出版タイプ
出版タイプ AM
出版タイプResource http://purl.org/coar/version/c_ab4af688f83e57aa
DOI
関連タイプ isVersionOf
識別子タイプ DOI
関連識別子 https://doi.org/10.1016/j.nima.2017.08.038
ISSN
収録物識別子タイプ PISSN
収録物識別子 0168-9002
書誌情報 en : NUCLEAR INSTRUMENTS & METHODS IN PHYSICS RESEARCH SECTION A-ACCELERATORS SPECTROMETERS DETECTORS AND ASSOCIATED EQUIPMENT

巻 874, p. 50-56, 発行日 2017-12-01
著者版フラグ
値 author
URI
識別子 http://doi.org/10.1016/j.nima.2017.08.038
識別子タイプ DOI
URI
識別子 http://hdl.handle.net/2237/27263
識別子タイプ HDL
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