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A Generalized Framework for Energy Savings in Real-Time Multiprocessor Systems
http://hdl.handle.net/2237/12101
http://hdl.handle.net/2237/121011bd7d564-1bda-47ef-8808-02febba39855
名前 / ファイル | ライセンス | アクション |
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Item type | 学術雑誌論文 / Journal Article(1) | |||||
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公開日 | 2009-08-27 | |||||
タイトル | ||||||
タイトル | A Generalized Framework for Energy Savings in Real-Time Multiprocessor Systems | |||||
言語 | en | |||||
著者 |
Zeng, Gang
× Zeng, Gang× Yokoyama, Tetsuo× Tomiyama, Hiroyuki× Takada, Hiroaki |
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アクセス権 | ||||||
アクセス権 | open access | |||||
アクセス権URI | http://purl.org/coar/access_right/c_abf2 | |||||
権利 | ||||||
言語 | en | |||||
権利情報 | Copyright © 2008 IEEE. Reprinted from International SoC Design Conference, 2008. ISOCC '08. v.01, 2008, p.I-44-I-49. This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply <br/>IEEE endorsement of any of Nagoya University’s products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for <br/>creating new collective works for resale or redistribution must be obtained from the IEEE by writing to pubs-permissions@ieee.org. | |||||
キーワード | ||||||
主題Scheme | Other | |||||
主題 | embedded real-time systems | |||||
キーワード | ||||||
主題Scheme | Other | |||||
主題 | energy-aware multiprocessor scheduling | |||||
キーワード | ||||||
主題Scheme | Other | |||||
主題 | dynamic hardware resource configuration | |||||
キーワード | ||||||
主題Scheme | Other | |||||
主題 | dynamic voltage frequency scaling | |||||
キーワード | ||||||
主題Scheme | Other | |||||
主題 | dynamic power management | |||||
抄録 | ||||||
内容記述タイプ | Abstract | |||||
内容記述 | A generalized dynamic energy performance scaling (DEPS) framework is proposed for exploring application-specific energy-saving potential in multiprocessor systems. This software-centric framework takes advantage of possible power control mechanisms to trade off performance for energy savings. Three existing technologies, i.e., dynamic hardware resource configuration (DHRC), dynamic voltage frequency scaling (DVFS), and dynamic power management (DPM), have been employed in this framework to achieve the maximal energy savings. The problem of determining the optimal task allocation and DEPS configurations is formulated as an integer linear programming (ILP) problem. Several practical issues such as how to reduce measurement and computation time and how to reduce the configuration overhead are also addressed. The effectiveness of DEPS is validated through a case study. | |||||
言語 | en | |||||
出版者 | ||||||
出版者 | IEEE | |||||
言語 | en | |||||
言語 | ||||||
言語 | eng | |||||
資源タイプ | ||||||
資源タイプ識別子 | http://purl.org/coar/resource_type/c_6501 | |||||
資源タイプ | journal article | |||||
出版タイプ | ||||||
出版タイプ | VoR | |||||
出版タイプResource | http://purl.org/coar/version/c_970fb48d4fbd8a85 | |||||
DOI | ||||||
関連タイプ | isVersionOf | |||||
識別子タイプ | DOI | |||||
関連識別子 | https://doi.org/10.1109/SOCDC.2008.4815570 | |||||
書誌情報 |
en : International SoC Design Conference (ISOCC '08) 巻 1, p. I44-I49, 発行日 2008-11 |
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フォーマット | ||||||
値 | application/pdf | |||||
著者版フラグ | ||||||
値 | publisher | |||||
URI | ||||||
識別子 | http://dx.doi.org/10.1109/SOCDC.2008.4815570 | |||||
識別子タイプ | DOI | |||||
URI | ||||||
識別子 | http://hdl.handle.net/2237/12101 | |||||
識別子タイプ | HDL |