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{"_buckets": {"deposit": "abe74208-72d2-4ed9-a77b-7fe58d244417"}, "_deposit": {"id": "12035", "owners": [], "pid": {"revision_id": 0, "type": "depid", "value": "12035"}, "status": "published"}, "_oai": {"id": "oai:nagoya.repo.nii.ac.jp:00012035", "sets": ["314"]}, "author_link": ["38165", "38166"], "item_10_biblio_info_6": {"attribute_name": "書誌情報", "attribute_value_mlt": [{"bibliographicIssueDates": {"bibliographicIssueDate": "2009-08", "bibliographicIssueDateType": "Issued"}, "bibliographicIssueNumber": "8", "bibliographicPageEnd": "648", "bibliographicPageStart": "644", "bibliographicVolumeNumber": "56", "bibliographic_titles": [{"bibliographic_title": "IEEE Transactions on Circuits and Systems II: Express Briefs", "bibliographic_titleLang": "en"}]}]}, "item_10_description_4": {"attribute_name": "抄録", "attribute_value_mlt": [{"subitem_description": "We propose a fast hardware algorithm for division in GF(2m) based on the extended Euclid\u0027s algorithm. The algorithm requires only one iteration to perform the operations that correspond to the ones performed in two iterations of previously reported division algorithms. Since the algorithm performs modular reductions in parallel by changing the order of execution of the operations, a circuit based on this algorithm has almost the same critical path delay as the previously proposed ones. The circuit computes division in m clock cycles, whereas the previously proposed circuits take 2m - 1 or more clock cycles.", "subitem_description_language": "en", "subitem_description_type": "Abstract"}]}, "item_10_identifier_60": {"attribute_name": "URI", "attribute_value_mlt": [{"subitem_identifier_type": "HDL", "subitem_identifier_uri": "http://hdl.handle.net/2237/13911"}, {"subitem_identifier_type": "DOI", "subitem_identifier_uri": "http://dx.doi.org/10.1109/TCSII.2009.2024253"}]}, "item_10_publisher_32": {"attribute_name": "出版者", "attribute_value_mlt": [{"subitem_publisher": "IEEE", "subitem_publisher_language": "en"}]}, "item_10_relation_11": {"attribute_name": "DOI", "attribute_value_mlt": [{"subitem_relation_type": "isVersionOf", "subitem_relation_type_id": {"subitem_relation_type_id_text": "https://doi.org/10.1109/TCSII.2009.2024253", "subitem_relation_type_select": "DOI"}}]}, "item_10_rights_12": {"attribute_name": "権利", "attribute_value_mlt": [{"subitem_rights": "©2009 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.", "subitem_rights_language": "en"}]}, "item_10_select_15": {"attribute_name": "著者版フラグ", "attribute_value_mlt": [{"subitem_select_item": "publisher"}]}, "item_10_source_id_7": {"attribute_name": "ISSN", "attribute_value_mlt": [{"subitem_source_identifier": "1549-7747", "subitem_source_identifier_type": "PISSN"}]}, "item_10_text_14": {"attribute_name": "フォーマット", "attribute_value_mlt": [{"subitem_text_value": "application/pdf"}]}, "item_1615787544753": {"attribute_name": "出版タイプ", "attribute_value_mlt": [{"subitem_version_resource": "http://purl.org/coar/version/c_970fb48d4fbd8a85", "subitem_version_type": "VoR"}]}, "item_access_right": {"attribute_name": "アクセス権", "attribute_value_mlt": [{"subitem_access_right": "open access", "subitem_access_right_uri": "http://purl.org/coar/access_right/c_abf2"}]}, "item_creator": {"attribute_name": "著者", "attribute_type": "creator", "attribute_value_mlt": [{"creatorNames": [{"creatorName": "Kobayashi, Katsuki", "creatorNameLang": "en"}], "nameIdentifiers": [{"nameIdentifier": "38165", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "Takagi, Naofumi", "creatorNameLang": "en"}], "nameIdentifiers": [{"nameIdentifier": "38166", "nameIdentifierScheme": "WEKO"}]}]}, "item_files": {"attribute_name": "ファイル情報", "attribute_type": "file", "attribute_value_mlt": [{"accessrole": "open_date", "date": [{"dateType": "Available", "dateValue": "2018-02-20"}], "displaytype": "detail", "download_preview_message": "", "file_order": 0, "filename": "takagi.pdf", "filesize": [{"value": "229.9 kB"}], "format": "application/pdf", "future_date_message": "", "is_thumbnail": false, "licensetype": "license_note", "mimetype": "application/pdf", "size": 229900.0, "url": {"label": "takagi.pdf", "objectType": "fulltext", "url": "https://nagoya.repo.nii.ac.jp/record/12035/files/takagi.pdf"}, "version_id": "d3e8cd2b-4c24-449c-9a17-8b54cbb1fa50"}]}, "item_keyword": {"attribute_name": "キーワード", "attribute_value_mlt": [{"subitem_subject": "Division", "subitem_subject_scheme": "Other"}, {"subitem_subject": "Euclid\u0027s algorithm", "subitem_subject_scheme": "Other"}, {"subitem_subject": "Galois field", "subitem_subject_scheme": "Other"}, {"subitem_subject": "hardware algorithm", "subitem_subject_scheme": "Other"}]}, "item_language": {"attribute_name": "言語", "attribute_value_mlt": [{"subitem_language": "eng"}]}, "item_resource_type": {"attribute_name": "資源タイプ", "attribute_value_mlt": [{"resourcetype": "journal article", "resourceuri": "http://purl.org/coar/resource_type/c_6501"}]}, "item_title": "Fast Hardware Algorithm for Division in GF(2m) Based on the Extended Euclid\u0027s Algorithm With Parallelization of Modular Reductions", "item_titles": {"attribute_name": "タイトル", "attribute_value_mlt": [{"subitem_title": "Fast Hardware Algorithm for Division in GF(2m) Based on the Extended Euclid\u0027s Algorithm With Parallelization of Modular Reductions", "subitem_title_language": "en"}]}, "item_type_id": "10", "owner": "1", "path": ["314"], "permalink_uri": "http://hdl.handle.net/2237/13911", "pubdate": {"attribute_name": "PubDate", "attribute_value": "2010-08-02"}, "publish_date": "2010-08-02", "publish_status": "0", "recid": "12035", "relation": {}, "relation_version_is_last": true, "title": ["Fast Hardware Algorithm for Division in GF(2m) Based on the Extended Euclid\u0027s Algorithm With Parallelization of Modular Reductions"], "weko_shared_id": -1}
  1. A500 情報学部/情報学研究科・情報文化学部・情報科学研究科
  2. A500a 雑誌掲載論文
  3. 学術雑誌

Fast Hardware Algorithm for Division in GF(2m) Based on the Extended Euclid's Algorithm With Parallelization of Modular Reductions

http://hdl.handle.net/2237/13911
http://hdl.handle.net/2237/13911
dd2d9b8c-097c-4063-8a8f-5d2a0a3ecc95
名前 / ファイル ライセンス アクション
takagi.pdf takagi.pdf (229.9 kB)
Item type 学術雑誌論文 / Journal Article(1)
公開日 2010-08-02
タイトル
タイトル Fast Hardware Algorithm for Division in GF(2m) Based on the Extended Euclid's Algorithm With Parallelization of Modular Reductions
言語 en
著者 Kobayashi, Katsuki

× Kobayashi, Katsuki

WEKO 38165

en Kobayashi, Katsuki

Search repository
Takagi, Naofumi

× Takagi, Naofumi

WEKO 38166

en Takagi, Naofumi

Search repository
アクセス権
アクセス権 open access
アクセス権URI http://purl.org/coar/access_right/c_abf2
権利
言語 en
権利情報 ©2009 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
キーワード
主題Scheme Other
主題 Division
キーワード
主題Scheme Other
主題 Euclid's algorithm
キーワード
主題Scheme Other
主題 Galois field
キーワード
主題Scheme Other
主題 hardware algorithm
抄録
内容記述 We propose a fast hardware algorithm for division in GF(2m) based on the extended Euclid's algorithm. The algorithm requires only one iteration to perform the operations that correspond to the ones performed in two iterations of previously reported division algorithms. Since the algorithm performs modular reductions in parallel by changing the order of execution of the operations, a circuit based on this algorithm has almost the same critical path delay as the previously proposed ones. The circuit computes division in m clock cycles, whereas the previously proposed circuits take 2m - 1 or more clock cycles.
言語 en
内容記述タイプ Abstract
出版者
言語 en
出版者 IEEE
言語
言語 eng
資源タイプ
資源タイプresource http://purl.org/coar/resource_type/c_6501
タイプ journal article
出版タイプ
出版タイプ VoR
出版タイプResource http://purl.org/coar/version/c_970fb48d4fbd8a85
DOI
関連タイプ isVersionOf
識別子タイプ DOI
関連識別子 https://doi.org/10.1109/TCSII.2009.2024253
ISSN
収録物識別子タイプ PISSN
収録物識別子 1549-7747
書誌情報 en : IEEE Transactions on Circuits and Systems II: Express Briefs

巻 56, 号 8, p. 644-648, 発行日 2009-08
フォーマット
application/pdf
著者版フラグ
値 publisher
URI
識別子 http://hdl.handle.net/2237/13911
識別子タイプ HDL
URI
識別子 http://dx.doi.org/10.1109/TCSII.2009.2024253
識別子タイプ DOI
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