{"_buckets": {"deposit": "0d8c6338-2672-4f63-9248-994af05fc963"}, "_deposit": {"id": "13045", "owners": [], "pid": {"revision_id": 0, "type": "depid", "value": "13045"}, "status": "published"}, "_oai": {"id": "oai:nagoya.repo.nii.ac.jp:00013045", "sets": ["322"]}, "author_link": ["41038", "41039", "41040"], "item_10_biblio_info_6": {"attribute_name": "書誌情報", "attribute_value_mlt": [{"bibliographicIssueDates": {"bibliographicIssueDate": "2009-11-01", "bibliographicIssueDateType": "Issued"}, "bibliographicIssueNumber": "11", "bibliographicPageEnd": "2195", "bibliographicPageStart": "2186", "bibliographicVolumeNumber": "E92-D", "bibliographic_titles": [{"bibliographic_title": "IEICE transactions on information and systems", "bibliographic_titleLang": "en"}]}]}, "item_10_description_4": {"attribute_name": "抄録", "attribute_value_mlt": [{"subitem_description": "Instruction pre-execution is an effective way to prefetch data. We previously proposed an instruction pre-execution scheme, which we call two-step physical register deallocation (TSD). The TSD realizes pre-execution by exploiting the difference between the amount of instruction-level parallelism available with an unlimited number of physical registers and that available with an actual number of physical registers. Although previous TSD study has successfully improved performance, it still has an inefficient energy consumption. This is because attempts are made for instructions to be pre-executed as much as possible, independently of whether or not they can significantly contribute to load latency reduction, allowing for maximal performance improvement. This paper presents a scheme that improves the energy efficiency of the TSD by pre-executing only those instructions that have great benefit. Our evaluation results using the SPECfp2000 benchmark show that our scheme reduces the dynamic pre-executed instruction count by 76%, compared with the original scheme. This reduction saves 7% energy consumption of the execution core with 2% overhead. Performance degrades by 2%, compared with that of the original scheme, but is still 15% higher than that of the normal processor without the TSD.", "subitem_description_language": "en", "subitem_description_type": "Abstract"}]}, "item_10_identifier_60": {"attribute_name": "URI", "attribute_value_mlt": [{"subitem_identifier_type": "URI", "subitem_identifier_uri": "http://www.ieice.org/jpn/trans_online/index.html"}, {"subitem_identifier_type": "HDL", "subitem_identifier_uri": "http://hdl.handle.net/2237/14940"}]}, "item_10_publisher_32": {"attribute_name": "出版者", "attribute_value_mlt": [{"subitem_publisher": "Institute of Electronics, Information and Communication Engineers", "subitem_publisher_language": "en"}]}, "item_10_relation_43": {"attribute_name": "関連情報", "attribute_value_mlt": [{"subitem_relation_type": "isVersionOf", "subitem_relation_type_id": {"subitem_relation_type_id_text": "http://www.ieice.org/jpn/trans_online/index.html", "subitem_relation_type_select": "URI"}}]}, "item_10_rights_12": {"attribute_name": "権利", "attribute_value_mlt": [{"subitem_rights": "Copyright (C) 2009 IEICE", "subitem_rights_language": "en"}]}, "item_10_select_15": {"attribute_name": "著者版フラグ", "attribute_value_mlt": [{"subitem_select_item": "publisher"}]}, "item_10_source_id_7": {"attribute_name": "ISSN", "attribute_value_mlt": [{"subitem_source_identifier": "0916-8532", "subitem_source_identifier_type": "PISSN"}]}, "item_1615787544753": {"attribute_name": "出版タイプ", "attribute_value_mlt": [{"subitem_version_resource": "http://purl.org/coar/version/c_970fb48d4fbd8a85", "subitem_version_type": "VoR"}]}, "item_access_right": {"attribute_name": "アクセス権", "attribute_value_mlt": [{"subitem_access_right": "open access", "subitem_access_right_uri": "http://purl.org/coar/access_right/c_abf2"}]}, "item_creator": {"attribute_name": "著者", "attribute_type": "creator", "attribute_value_mlt": [{"creatorNames": [{"creatorName": "HYODO, Kazunaga", "creatorNameLang": "en"}], "nameIdentifiers": [{"nameIdentifier": "41038", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "IWAMOTO, Kengo", "creatorNameLang": "en"}], "nameIdentifiers": [{"nameIdentifier": "41039", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "ANDO, Hideki", "creatorNameLang": "en"}], "nameIdentifiers": [{"nameIdentifier": "41040", "nameIdentifierScheme": "WEKO"}]}]}, "item_files": {"attribute_name": "ファイル情報", "attribute_type": "file", "attribute_value_mlt": [{"accessrole": "open_date", "date": [{"dateType": "Available", "dateValue": "2018-02-20"}], "displaytype": "detail", "download_preview_message": "", "file_order": 0, "filename": "349.pdf", "filesize": [{"value": "531.7 kB"}], "format": "application/pdf", "future_date_message": "", "is_thumbnail": false, "licensetype": "license_note", "mimetype": "application/pdf", "size": 531700.0, "url": {"label": "349.pdf", "objectType": "fulltext", "url": "https://nagoya.repo.nii.ac.jp/record/13045/files/349.pdf"}, "version_id": "fed7fd45-4e00-4b58-89ef-b08aaa929812"}]}, "item_keyword": {"attribute_name": "キーワード", "attribute_value_mlt": [{"subitem_subject": "microarchitecture", "subitem_subject_scheme": "Other"}, {"subitem_subject": "microprocessor", "subitem_subject_scheme": "Other"}, {"subitem_subject": "instruction pre-execution", "subitem_subject_scheme": "Other"}, {"subitem_subject": "low power", "subitem_subject_scheme": "Other"}]}, "item_language": {"attribute_name": "言語", "attribute_value_mlt": [{"subitem_language": "eng"}]}, "item_resource_type": {"attribute_name": "資源タイプ", "attribute_value_mlt": [{"resourcetype": "journal article", "resourceuri": "http://purl.org/coar/resource_type/c_6501"}]}, "item_title": "Energy-Efficient Pre-Execution Techniques in Two-Step Physical Register Deallocation", "item_titles": {"attribute_name": "タイトル", "attribute_value_mlt": [{"subitem_title": "Energy-Efficient Pre-Execution Techniques in Two-Step Physical Register Deallocation", "subitem_title_language": "en"}]}, "item_type_id": "10", "owner": "1", "path": ["322"], "permalink_uri": "http://hdl.handle.net/2237/14940", "pubdate": {"attribute_name": "PubDate", "attribute_value": "2011-06-24"}, "publish_date": "2011-06-24", "publish_status": "0", "recid": "13045", "relation": {}, "relation_version_is_last": true, "title": ["Energy-Efficient Pre-Execution Techniques in Two-Step Physical Register Deallocation"], "weko_shared_id": -1}