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  1. A500 情報学部/情報学研究科・情報文化学部・情報科学研究科
  2. A500e 会議資料
  3. 国際会議

An Accuracy Reconfigurable Vector Accelerator Based on Approximate Logarithmic Multipliers

http://hdl.handle.net/2237/0002002806
http://hdl.handle.net/2237/0002002806
a619019d-6271-4ddd-bf97-321ed1ca4e24
名前 / ファイル ライセンス アクション
ASPDAC_Hou_submit.pdf ASPDAC_Hou_submit.pdf (2.2 MB)
Item type itemtype_ver1(1)
公開日 2022-05-17
タイトル
タイトル An Accuracy Reconfigurable Vector Accelerator Based on Approximate Logarithmic Multipliers
言語 en
著者 Hou, Lingxiao

× Hou, Lingxiao

en Hou, Lingxiao

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Masuda, Yutaka

× Masuda, Yutaka

en Masuda, Yutaka

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Ishihara, Tohru

× Ishihara, Tohru

en Ishihara, Tohru

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アクセス権
アクセス権 open access
アクセス権URI http://purl.org/coar/access_right/c_abf2
権利
言語 en
権利情報 “© 2022 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.”
内容記述
内容記述タイプ Abstract
内容記述 The logarithmic approximate multiplier proposed by Mitchell provides an efficient alternative to accurate multipliers in terms of area and power consumption. However, its maximum error of 11.1% makes it difficult to deploy in applications requiring high accuracy. To widely reduce the error of the Mitchell multiplier, this paper proposes a novel operand decomposition method which decomposes one operand into multiple operands and calculates them using multiple Mitchell multipliers. Based on this operand decomposition, this paper also proposes an accuracy reconfigurable vector accelerator which can provide a required computational accuracy with a high parallelism. The proposed vector accelerator dramatically reduces the area by more than half from the accurate multiplier array while satisfying the required accuracy for various applications. The experimental results show that our proposed vector accelerator behaves well in image processing and robot localization.
言語 en
内容記述
内容記述タイプ Other
内容記述 2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC). 17-20 Jan. 2022. Taipei, Taiwan
言語 en
出版者
出版者 IEEE
言語 en
言語
言語 eng
資源タイプ
資源タイプresource http://purl.org/coar/resource_type/c_6501
タイプ journal article
出版タイプ
出版タイプ AM
出版タイプResource http://purl.org/coar/version/c_ab4af688f83e57aa
関連情報
関連タイプ isVersionOf
識別子タイプ DOI
関連識別子 https://doi.org/10.1109/ASP-DAC52403.2022.9712504
関連情報
関連タイプ isPartOf
識別子タイプ ISBN
関連識別子 978-1-6654-2135-5
収録物識別子
収録物識別子タイプ PISSN
収録物識別子 2153-6961
書誌情報 en : ASP-DAC 2022 : 27th Asia and South Pacific Design Automation Conference : Proceedings

p. 568-573, 発行日 2022-02-21
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