Item type |
itemtype_ver1(1) |
公開日 |
2022-10-21 |
タイトル |
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タイトル |
Optoelectronic Implementation of Compact and Power-efficient Recurrent Neural Networks |
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言語 |
en |
著者 |
Ichikawa, Taisei
Masuda, Yutaka
Ishihara, Tohru
Shinya, Akihiko
Notomi, Masaya
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アクセス権 |
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アクセス権 |
open access |
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アクセス権URI |
http://purl.org/coar/access_right/c_abf2 |
権利 |
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言語 |
en |
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権利情報 |
“© 2022 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.” |
キーワード |
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主題Scheme |
Other |
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主題 |
optical computing |
キーワード |
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主題Scheme |
Other |
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主題 |
neuromorphic computing |
キーワード |
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主題Scheme |
Other |
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主題 |
recurrent neural network |
内容記述 |
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内容記述 |
Optoelectronic implementation of artificial neural networks (ANNs) has been attracting significant attention due to its potential for low-power computation at the speed of light. Among the ANNs, adopting recurrent neural network (RNN) is a promising solution since it provides sufficient inference accuracy with a more compact structure than other ANNs. This paper proposes a novel optoelectronic architecture of RNN. The key idea is to implement the vector-matrix multiplication optically to exploit the speed of light and implement the activation and feedback electronically to exploit the controllability of electronics. The electronics part is composed of an electrical feedback circuit with a dynamic latch to synchronize the recurrent loops with a clock signal. Using a commercial optoelectronic circuit simulator, we confirm the correct behavior of the optoelectronic RNN. Experimental results obtained using TensorFlow show that the proposed optoelectronic RNN achieves more than 98% inference accuracy in image classification with a minimal footprint without sacrificing low-power and high-speed nature of light. |
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言語 |
en |
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内容記述タイプ |
Abstract |
内容記述 |
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内容記述 |
2022 IEEE Computer Society Annual Symposium on VLSI (ISVLSI). 04-06 July 2022. Nicosia, Cyprus |
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言語 |
en |
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内容記述タイプ |
Other |
出版者 |
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言語 |
en |
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出版者 |
IEEE |
言語 |
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言語 |
eng |
資源タイプ |
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資源タイプresource |
http://purl.org/coar/resource_type/c_5794 |
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タイプ |
conference paper |
出版タイプ |
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出版タイプ |
AM |
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出版タイプResource |
http://purl.org/coar/version/c_ab4af688f83e57aa |
関連情報 |
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関連タイプ |
isVersionOf |
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識別子タイプ |
DOI |
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関連識別子 |
https://doi.org/10.1109/ISVLSI54635.2022.00087 |
収録物識別子 |
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収録物識別子タイプ |
PISSN |
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収録物識別子 |
2159-3469 |
書誌情報 |
en : 2022 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
発行日 2022-10
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