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We have analyzed the interference for low-voltage-driven SFQ circuits used by measurement and simulation We study low-voltage-driven SFQ circuits toward lowering the energy consumption of SFQ circuits We considered the interference between JJ and all other JJs when one JJ is switching And we evaluated the frequency characteristic of operating region of logical gate The interference effected on AND gate We suggest a way to reduce the floating inductance in the bias line.", "subitem_description_type": "Abstract"}]}, "item_10_description_5": {"attribute_name": "\u5185\u5bb9\u8a18\u8ff0", "attribute_value_mlt": [{"subitem_description": "(\u8d85\u4f1d\u5c0e\u30bb\u30f3\u30b7\u30f3\u30b0\u57fa\u76e4\u6280\u8853\u53ca\u3073\u305d\u306e\u5fdc\u7528,\u4e00\u822c)", "subitem_description_type": "Other"}]}, "item_10_identifier_60": {"attribute_name": "URI", "attribute_value_mlt": [{"subitem_identifier_type": "URI", "subitem_identifier_uri": "http://ci.nii.ac.jp/naid/110009727942/"}, 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